Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
A Verilog implementation that has been synthesized into our 7 Series and Zynq products. This implementation has been governed in our internal revision control system. This implementation can be simulated via a synopsys VCS simulation/testbench framework.
Version
7 Series and Zynq
Type
HARDWARE
Vendor
Xilinx, Inc.
2100 Logic Drive
San Jose, CA 95124
USA
Contacts
Jason Moore
Jason.Moore@xilinx.com
505-798-4863

HMAC 1465 Expand All First Validated: 3/29/2013

Operating Environment Algorithm Capabilities
N/A HMAC-SHA2-256 Expand

Created October 05, 2016, Updated December 18, 2020