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Cryptographic Algorithm Validation Program CAVP

Description
Currently tested algorithms are included in EPYC 9005 Series "Turin", EPYC 8005 Series "Sorano", EPYC Embedded 9005 Series "Turin", EPYC Embedded 8005 Series "Sorano", Ryzen "Shimada Peak". DRBG implemented in the AMD True Random Number Generator (TRNG).
Version
C1-1
Type
HARDWARE
Vendor
Advanced Micro Devices (AMD)
2485 Augustine Drive
Santa Clara, CA 95054
USA
Contacts
FIPS Contact
FIPS@amd.com
+1 408-749-4000

A5795

   First Validated: 9/19/2024
Operating Environment Algorithm Capabilities
UVM kit 1.2 v5.3.1.rc2 Expand
    AES-ECB Expand
    UVM kit 1.2 v5.3.1.rc2 Expand
      Counter DRBG Expand

      Created October 05, 2016, Updated August 08, 2024